London AI chip startup OLIX, founded by James Dacombe has raised $312 million in a Series B funding round that values the two-year-old company at $3.3 billion.

Founded by James Dacombe, OLIX secured backing from Fundomo, Arm and Hudson River Trading. Reed Hastings, the co-founder of Netflix, also participated as an angel investor. Existing investors Hummingbird Ventures, Crane, Plural, Creandum, Phoenix Court and Transition increased their commitments in the round.

The funding gives OLIX fresh capital to develop an AI inference system that departs from the industry’s reliance on general-purpose processors. Rather than designing a single chip to handle every part of an AI workload, the company is building specialised processors for different stages of generating an output.

A different approach to AI inference

OLIX compares an AI data centre to a factory that produces tokens, the individual units generated by artificial intelligence models. Producing each token requires hundreds of operations, with different stages placing different demands on computing hardware.

The company argues that running every stage on the same general-purpose processor limits efficiency. Its alternative is to divide the workload across multiple specialised chips, allowing each processor to concentrate on a particular part of the model.

This approach forms the basis of OLIX’s X-1 platform. Models are distributed, or “unrolled”, across a large number of chips in a production-line arrangement. Each chip handles a defined section of the model while retaining a flexible computing architecture, rather than being permanently designed around one specific AI model.

OLIX is designing the chips, lasers and networking components used in the system. The finished infrastructure will be supplied as complete racks intended for demanding AI inference workloads.

Optical links connect the system

Moving information efficiently between a large number of processors is central to the company’s design.

The X-1 platform uses what OLIX describes as a “slow and wide” optical interconnect. Instead of relying on copper connections, the system transfers data directly between chips using light. The company says this architecture can reduce latency and energy consumption.

OLIX is developing the platform through rack-scale codesign, bringing the chips, optical links and broader system together rather than treating them as separate components. Workloads will be allocated across racks through a deterministic compiler.

DX-1 becomes OLIX’s first chip

The first processor planned for the X-1 platform is DX-1, a decode accelerator designed for the stage where an AI model reasons and produces its response.

For models with 100 billion parameters, OLIX claims that DX-1 can deliver more than 10,000 tokens per second for each user while achieving higher output-token throughput per watt than general-purpose chips operating with large batch sizes.

OLIX also says its multi-rack architecture will allow the platform to support models with 10 trillion parameters or more. DX-1 is designed to store a model in fast on-chip SRAM, which the company expects to improve energy efficiency and reduce latency.

The processor has also been designed without advanced packaging or high-bandwidth memory. Both components are in limited supply across the semiconductor industry, and OLIX believes avoiding them will make it easier to increase production volumes.

First customer deliveries targeted for 2027

OLIX plans to use the Series B proceeds to deliver DX-1 to its first customers during the second half of 2027.

The capital will also support development of the wider custom silicon platform, along with manufacturing arrangements and supply-chain commitments needed to produce the hardware at scale.

As part of that expansion, the company is recruiting across silicon, photonics, compiler and systems engineering. Its hiring effort covers London, Bristol, Austin, Toronto and San Francisco.

The fundraise gives OLIX substantial financial backing for an ambitious technical strategy. The next test will be whether the company can turn its rack-scale architecture and specialised inference processors into commercially deployable systems on its stated timeline.

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